RISC-V's Edge & IoT Takeover: Billions of Open-Source Cores Drive 2025 Tech Revolution

• RISC-V core shipments are exploding: Over 13 billion RISC-V processor cores have been shipped as of 2023, many in IoT and embedded devices riscv.org. Analysts estimate billions of RISC-V cores now ship annually for microcontrollers, sensors, and IoT chips ts2.tech.
• Nvidia’s massive adoption: In 2024, Nvidia alone is expected to ship ~1 billion RISC-V cores inside its GPUs, SoCs, and other products tomshardware.com – a testament to RISC-V’s ubiquity even in traditionally closed platforms.
• Major industry milestones: Qualcomm surpassed 1 billion devices with RISC-V microcontrollers by late 2023 riscv.org. And Renesas – a top MCU vendor – launched its first RISC-V-based general-purpose microcontrollers in 2024 riscv.org, signaling mainstream MCU adoption.
• Ecosystem catching up fast: RISC-V now enjoys broad OS and toolchain support (Linux, Zephyr RTOS, FreeRTOS, Android-on-RISC-V in progress) and modern compilers (GCC, LLVM). However, it still trails ARM in some areas like fully mature IDEs, debug tools, and safety certifications embedded.com. Efforts like RISC-V Profiles (e.g. RVA23) aim to standardize features for software compatibility riscv.org.
• Big wins in IoT and automotive: From wearables to cars, RISC-V is making inroads. Amazfit smartwatches (by Huami) use custom RISC-V chips for AI fitness tracking, and a RISC-V-based smartwatch was showcased at the 2023 RISC-V Summit riscv.org. In automotive, a new joint venture Quintauris (backed by Bosch, Infineon, NXP, Qualcomm, Nordic) is developing safety-certified RISC-V IP for car ECUs autocarpro.in autocarpro.in.
• ARM feeling the heat: RISC-V’s open model offers lower cost and flexibility versus Arm’s Cortex-M. For simple 32-bit MCUs, RISC-V cores now rival ARM Cortex-M in performance at lower cost, attracting vendors like Espressif (which switched its popular ESP32 IoT chips to RISC-V cores) ts2.tech. Industry experts predict RISC-V could reach double-digit MCU market share by ~2025 given its rapid adoption ts2.tech.

RISC-V Shipments Soar in Edge & IoT Devices

Once a niche academic project, RISC-V is now shipping in billions of devices, especially at the edge. RISC-V International reports the ISA is implemented in over 13 billion cores on the market as of end-2023 riscv.org – a stunning rise driven largely by IoT and embedded use cases. In fact, some estimates suggest over 10 billion of those cores were shipped by 2023 primarily for IoT sensors, microcontrollers, storage controllers, and wireless chips ts2.tech. The momentum is accelerating: according to the CEO of RISC-V International, “the ecosystem is expanding rapidly… over two billion SoCs are now using RISC-V cores,” and they anticipate 20 billion+ RISC-V-powered SoCs by 2031 riscv.org.

Notably, Nvidia’s embrace of RISC-V exemplifies this scale. Nvidia revealed that virtually all of its GPU/SoC microcontrollers have moved to RISC-V since 2015, and by 2024 it would ship around a billion RISC-V cores hidden inside its products tomshardware.com. Each advanced GPU packs dozens of RISC-V control cores, so with tens of millions of GPUs shipped, the RISC-V count multiplies quickly. “In 2024, Nvidia is expected to ship ~1 billion RISC-V cores built into its GPUs, CPUs, SoCs, and other products,” reported Tom’s Hardware tomshardware.com. Even Qualcomm – a mobile/IoT giant – disclosed it has integrated RISC-V microcontrollers into many chips, hitting one billion RISC-V-based devices shipped by late 2023 riscv.org.

This rapid proliferation is especially evident in IoT-focused regions like China. RISC-V’s openness aligns with national tech agendas, and China has declared that all domestic IoT chips must use RISC-V by 2027 as a matter of industrial policy electropages.com. In other words, within a few years, virtually every “smart” device produced in China – from appliances to wearables – could have a RISC-V brain. This open-ISA mandate underscores how strategic RISC-V has become in the Edge/IoT space, promising freedom from foreign licensing. As one analysis put it, “China’s RISC-V adoption is no longer grassroots – it’s now national policy” to drive innovation in IoT without restrictions electropages.com.

How does this compare to ARM? Arm’s Cortex-M and other cores still ship in greater absolute numbers (Arm-based MCUs are ubiquitous in appliances, cars, etc.), but RISC-V is rapidly closing the gap in the new deployments. Industry data shows Arm’s MCU business remains huge – e.g. 30+ billion Arm-based microcontrollers are expected annually by the mid-2020s – but almost all growth in the sector is gravitating to RISC-V ts2.tech. Many smaller vendors who might have licensed an Arm Cortex-M are now opting for royalty-free RISC-V cores instead. The result is that RISC-V’s share of the IoT microcontroller market is set to reach double digits in the near future, up from essentially zero a few years ago ts2.tech. Arm is responding by pushing new Cortex-M IP and offering more flexible licensing for IoT, but the momentum favors RISC-V in cost-sensitive, high-volume edge applications ts2.tech ts2.tech.

Ecosystem Readiness: Hardware Partners, Software Stacks, and OS Support

One reason for RISC-V’s surge in edge markets is the blossoming of its ecosystem – both in silicon providers and in software/tool support. On the hardware side, a who’s-who of chip companies now back RISC-V. Traditional MCU leaders like Renesas, NXP, Microchip, and Infineon have all joined RISC-V initiatives, alongside countless startups and IP vendors. In 2024, Renesas made waves launching the R9A02G021 MCU – the industry’s first general-purpose MCU line built on an in-house RISC-V core riscv.org. This 48 MHz, ultra-low-power chip is aimed at IoT gadgets and marks Renesas’ entry after decades of proprietary cores. Likewise, Microchip offers the PolarFire SoC with RISC-V cores for FPGA-based IoT systems ts2.tech. Chinese fabless firms are even more aggressive: Espressif moved its popular ESP32 IoT Wi-Fi/Bluetooth SoC line to a 32-bit RISC-V core (replacing Tensilica) ts2.tech, and MCU makers like GigaDevice and Allwinner now ship RISC-V microcontrollers. Even Western Digital designed its own RISC-V core (SweRV) for use in storage controllers and SSDs ts2.tech – a hint that billions of RISC-V cores lurk in “invisible” roles inside drives and memory devices.

Crucially, the software stack and toolchains have matured to support these hardware moves. RISC-V’s software ecosystem in 2025 is robust and rapidly expanding. The GNU GCC and LLVM Clang compilers fully support RISC-V (with upstream support for standard extensions like atomic, DSP, and vector operations). OS support has gone from patchy to mainstream: the Linux kernel has supported RISC-V 64-bit for years, and now even Android is on the horizon. Google, Intel, and others formed the RISE consortium in 2023 explicitly to accelerate RISC-V software support (from Android to ChromeOS and toolchains) ts2.tech. Indeed, Google has been porting Android to RISC-V and announced that Android will treat RISC-V as a tier-1 platform in future releases, ensuring apps and the Play ecosystem run on RISC-V phones or IoT devices. In IoT and embedded, the choices abound: Zephyr RTOS, a popular open-source real-time OS for IoT, has excellent RISC-V support; Amazon’s FreeRTOS and Microsoft’s Azure RTOS have RISC-V ports as well. Even deeply embedded software like AVR (for 8-bit) is seeing RISC-V replacements in some domains.

Beyond OS kernels, middleware and stacks are coming online. For example, IoT connectivity stacks (Bluetooth LE, Zigbee, LTE-M/NB-IoT) have been ported to RISC-V on various platforms. Additionally, development tools that embedded engineers rely on – IDEs, debuggers, analyzers – are increasingly RISC-V capable. The once-Arm-exclusive Keil tools now face competition from RISC-V-friendly suites. IAR Systems and Segger, two big embedded tool vendors, have both extended support to RISC-V. In late 2024, Segger’s Ozone debugger added advanced RISC-V semihosting features for easier debugging of RISC-V apps riscv.org, and LDRA’s testing tools added RISC-V support for safety-critical software analysis riscv.org. These developments indicate that a professional toolchain ecosystem (IDE, compiler, debugger, analyzer) is coming together for RISC-V, reducing the friction for companies switching from ARM.

Operating system support has also reached a new level of readiness. Besides IoT RTOSes, full-featured OSes like Ubuntu Linux and Fedora have RISC-V editions, enabling RISC-V single-board computers to run high-level software. Notably, Canonical’s Ubuntu Core (a minimal containerized OS for IoT gateways) now supports RISC-V boards ts2.tech. This means edge gateways and hubs can run secure Linux on RISC-V SoCs, complementing the microcontrollers in end devices. At the 2023 RISC-V Summit, a standard RISC-V profile for 64-bit application processors (RVA23) was ratified, which defines a baseline set of ISA features for running modern OSes like Linux/Android smoothly riscv.org. The RVA23 profile includes the vector and hypervisor extensions, among others, to ensure that RISC-V chips meant for rich OS environments can run the necessary software out-of-the-box. This kind of profile is aimed at preventing fragmentation (an oft-cited risk for RISC-V) and making sure a RISC-V device from any vendor can run common software distributions. All told, by 2025 the software gap has narrowed dramatically – RISC-V is no longer “unsupported” in major frameworks, and that gives IoT device makers confidence that choosing RISC-V won’t leave them stranded.

In short, ecosystem readiness has reached a tipping point. As SiFive’s CEO Patrick Little remarked, RISC-V now offers an “end-to-end portfolio” for automotive and beyond, combining the ISA’s benefits with a growing ecosystem to meet industry’s needs “today and long into the future” sifive.com. And in the words of Calista Redmond (RISC-V International’s CEO), the momentum reflects “the increasing adoption of open standards and the growing recognition of RISC-V as a transformative force” across industries riscv.org.

Mind the Gaps: Toolchain & Ecosystem Challenges in Embedded/Real-Time Domains

For all the progress, RISC-V’s ecosystem still has some gaps and growing pains – especially in deeply embedded and real-time systems where ARM has decades of head start. Industry observers note that RISC-V must prove equal to ARM in ecosystem depth: “RISC-V still has to prove it can offer the same level of ecosystem depth and reliability in domains like kernel integration, toolchain maturity, compatibility, and certification,” one 2025 analysis cautioned embedded.com. In practice, this means there are a few areas to watch:

• Fragmentation vs. Standardization: The very flexibility that makes RISC-V attractive (custom extensions, many core vendors) can lead to fragmentation. Without care, two RISC-V chips might implement slightly different extensions or require different toolchain tweaks. Efforts like the RVA profiles and RISC-V International’s compliance suites are addressing this. But some developers still worry about inconsistent support – a lesson from past open architectures. ARM, in contrast, has a rigid spec and a single source, which ensured uniform tool support. RISC-V’s community is responding by tightening standards (e.g., requiring certain extension sets for profiles like RVA23 to run Linux/Android uniformly riscv.org).
• Toolchain polish and IDE support: While GCC/LLVM support RISC-V, commercial IDEs and on-chip debugging support are catching up. ARM ecosystems enjoy mature tools like Keil μVision and widely used debug adapters. RISC-V tooling is improving (with companies like Segger, Lauterbach, and UltraSoC adding RISC-V support), but developers may still find fewer out-of-the-box options. Certain niche toolchains (for example, highly optimized DSP libraries or proprietary RTOS integrations) might not yet support RISC-V as fully. However, this gap is closing quickly as market demand grows. Notably, by late 2024 the acclaimed SEGGER J-Link debugger supported RISC-V devices widely, and Lauterbach’s TRACE32 added full debug/trace for Synopsys’ ARC-V RISC-V IP riscv.org, indicating high-end tooling parity is within reach.
• Real-time and safety certifications: In automotive and industrial real-time systems, CPUs must meet strict safety standards (ISO 26262 for automotive, DO-178C for aerospace, etc.). ARM Cortex-R and Cortex-M offerings have years of safety documentation, certified compilers, and proven usage in safety-critical ECUs. RISC-V cores historically lacked this pedigree, but this is changing. The RISC-V ecosystem now has cores designed for functional safety (for example, the automotive-focused MIPS P8700 core targets ISO 26262 ASIL B/D applications). Andes Technology obtained ISO 26262 certification for its development processes to offer ASIL D ready RISC-V IP nasdaq.com. Still, ecosystem maturity here means not just the CPU design but also the certified toolchain, the MISRA-compliant compilers, coverage of edge cases in formal verification – areas where RISC-V is making progress but isn’t yet as “battle-hardened” as ARM’s long-standing offerings. Early adopters like Dubravko (whoever the specific user is) need to navigate this carefully, but the outlook is promising as more safety-critical RISC-V projects (in automotive and even aerospace) come to market.
• Software optimization and legacy support: RISC-V being new means that some optimized libraries or language runtimes aren’t as tuned as their ARM or x86 equivalents – yet. For example, certain JIT compilers or math libraries might not initially have RISC-V hand-optimized assembly. This can impact performance in specific workloads until the community catches up. On the legacy side, RISC-V has no direct support for x86/ARM binaries, so any existing proprietary software for edge devices has to be recompiled or ported. In IoT this is often a minor issue (most code is open-source or easily recompiled), but for some industrial systems that rely on vendor binaries, it’s a consideration.
• Vendor support and documentation: Many IoT developers are used to vendor-provided Software Development Kits (SDKs) for ARM chips (think STMicro’s CubeMX or NXP’s MCUXpresso). With RISC-V’s more decentralized nature, equivalent SDKs exist but may be vendor-specific (each new RISC-V chip vendor has its own set of libraries). Initiatives like the OpenHW Group and RISC-V community projects are pushing for unified documentation and SDK efforts. Until that fully materializes, developers might need to rely more on community forums and open-source examples when working with a brand-new RISC-V MCU.

Despite these challenges, none are show-stoppers. They are typical for a rapidly maturing technology. As one embedded industry veteran put it: the question now is not “can RISC-V attract interest,” but “when it will truly deliver” on being production-ready at scale embedded.com. Every summit and release in 2024–2025 has demonstrated strides toward that readiness: more upstream Linux drivers, more reference designs, more big vendors onboard to smooth the rough edges. The community nature of RISC-V can actually accelerate these fixes – a critical bug in an open RISC-V toolchain might be fixed by a contributor, whereas in a closed ecosystem you’d wait for the vendor. The formation of the RISC-V Software Ecosystem (RISE) coalition is a direct answer to such gaps, pooling resources from industry leaders to turbo-charge toolchain and OS improvements linuxfoundation.eu. All told, the remaining gaps in RISC-V’s ecosystem are rapidly shrinking, and there’s broad recognition that “in this race, whoever gets the software right wins.” embedded.com

Design Wins and Announcements: From Wearables to Industrial IoT to Automotive

RISC-V’s momentum in edge applications is illustrated by a flurry of design wins and product announcements in the past two years. These span the gamut of Edge and IoT: wearables on your wrist, tiny controllers in appliances, smart sensors in factories, and even the brains of future autonomous vehicles. Here are some of the highlights:

• Wearables & Consumer Devices: RISC-V has officially entered the wearable tech arena. Huami (Zepp Health) – known for Amazfit fitness wearables – was an early pioneer, developing the Huangshan series of RISC-V based co-processors for heart rate and ECG monitoring. The latest Huangshan-2S chip is a RISC-V design optimized for AI tasks on the watch, and powers features in Amazfit smartwatches uk.amazfit.com gadgetbytenepal.com. In 2023, RISC-V International even showcased a full RISC-V based smartwatch at its Summit, demonstrating a custom watch running on a RISC-V SoC riscv.org. This indicates that reference designs for RISC-V wearables are now viable. Additionally, wireless earbuds and fitness trackers with RISC-V cores are emerging via startups focusing on ultra-low power AI (for voice recognition on-device, etc.). For instance, GreenWaves Technologies’ GAP9 chip (with RISC-V cores) targets hearables and always-on sensor hubs. Even some smart home appliances and consumer gadgets now quietly run RISC-V inside their MCUs – especially as Chinese OEMs replace Arm cores in these high-volume, cost-driven products.
• Microcontrollers (MCUs): Perhaps the biggest splash has been in the MCU world. We’ve already noted Renesas’s launch of a RISC-V MCU line (the RA MCU family expansion) riscv.org. Another traditional MCU giant, NXP, hasn’t released a RISC-V MCU yet but is investing heavily (they co-founded the automotive RISC-V JV and have RISC-V teams internally). Andes Technology, a leading CPU IP vendor for MCUs, reported that through 2024 its licensees have shipped over 16 billion SoCs using Andes RISC-V cores (over 2 billion in 2024 alone) andestech.com – a large portion of those are microcontrollers and IoT chips. This underscores how many design wins are happening behind the scenes: myriad IoT devices choosing Andes or SiFive RISC-V IP for their new designs. Even the hobbyist and maker community has RISC-V options: Arduino released boards like the Arduino Cinque that feature RISC-V processors, enabling the vast Arduino ecosystem to experiment with RISC-V ts2.tech. Similarly, ESP32-C3 boards (RISC-V) are now common in the IoT maker scene, bringing RISC-V to tens of thousands of tinkerers and prototype projects. These wins might not make front-page news individually, but collectively they signal that RISC-V MCUs are becoming as normal as ARM MCUs in new product designs.
• Smart Sensors & Edge AI: A lot of “intelligence at the edge” is driven by specialized chips combining sensing with processing (for example, a camera sensor with an AI accelerator for object detection, or an audio sensor with keyword spotting). RISC-V is proving attractive in this domain due to its customizable nature. AI startups like Esperanto and Syntiant have built inference accelerators with RISC-V control cores orchestrating the AI engines. For instance, Esperanto’s ET-SoC-1 put over a thousand tiny RISC-V cores on one chip for efficient edge AI workloads ts2.tech. On a smaller scale, OmniVision (a camera sensor company) integrated a RISC-V core to handle image processing on-sensor, reducing the need for external processing. Bosch and other sensor makers are reportedly evaluating RISC-V for future IMUs and environmental sensors, where an internal RISC-V core could manage calibration and sensor fusion. In industrial IoT, companies are announcing smart sensors with built-in RISC-V microcontrollers that can run TinyML models – think vibration sensors in a factory that analyze data on-board. RISC-V’s low power and cost, plus the ability to tailor the core (e.g., add a custom instruction for sensor filtering), make it ideal here. These design wins are sometimes announced at events (for example, at Embedded World 2024 a few startups showed off RISC-V-based smart vision sensors), signaling that RISC-V is permeating even the smallest smart devices.
• Industrial & Automotive IoT: The industrial sector – including robotics, PLCs, and vehicle systems – is moving cautiously but steadily toward RISC-V. A major catalyst was the formation of the Quintauris GmbH joint venture in Germany in 2023, pooling five industry giants (Bosch, Infineon, Nordic, NXP, Qualcomm) to create standard RISC-V hardware for automotive and industrial use autocarpro.in autocarpro.in. This JV will produce reference designs and IP that smaller suppliers can use, essentially paving the road for RISC-V in safety-critical and high-reliability applications. It’s significant because companies like Bosch (a top automotive MCU user) and NXP (an automotive chip leader) wouldn’t invest at this scale unless they foresee RISC-V-based chips in cars and factories in the near future. While actual cars with RISC-V ECU chips might only hit the market ~2026-2027 (given design cycles), the design wins are being locked in now. For example, in 2024 MIPS announced its P8700 RISC-V core for automotive (with lockstep and safety features) and is engaging Tier-1 suppliers. Europe’s Euprocessor project and EPI (European Processor Initiative) are also funding RISC-V CPU development for automotive and industrial applications, ensuring an ecosystem of compilers and OS (like QNX, AUTOSAR adapters) is ready.

In industrial IoT more broadly, RISC-V has scored wins in PLCs and networking. One example: Siemens is reportedly testing RISC-V in some Industry 4.0 controllers. In China, many industrial equipment makers have announced RISC-V controller boards for IoT gateways, sometimes replacing an Intel or ARM solution to have a fully domestically designed unit. RISC-V’s ability to be extended means industrial OEMs can add custom instructions for protocols or encryption specific to their fieldbus, which is very appealing.

• Automotive ECUs & ADAS: For advanced automotive (ADAS and autonomous driving), RISC-V cores are being used as support processors within larger systems. For instance, Horizon Robotics (China) uses RISC-V cores alongside AI accelerators in their autonomous driving chips. Tesla’s FSD computer hasn’t gone RISC-V (it’s custom ARM-based), but future designs by other automakers could. The zonal architectures trending in cars (where many functions are consolidated in a few powerful ECUs) create opportunities for RISC-V to be the common ISA across many domains in the car. SiFive launched an automotive RISC-V IP portfolio (E6-A, S7-A, X280-A cores) targeting everything from safety islands to high-performance ADAS computations sifive.com sifive.com. They announced engagement with multiple top-tier automotive suppliers using these cores. And as mentioned, Renesas plans to leverage SiFive’s RISC-V cores in future automotive SoCs (Renesas’s own SVP noted their collaboration to bring RISC-V’s “strong benefits” to upcoming car processors) sifive.com. In the competitive automotive market, these are effectively pre-win announcements that signal RISC-V will be in the mix for next-gen vehicles.

Across all these examples, the common theme is customization and cost. RISC-V wins designs either because it lets the vendor customize the processor to exactly fit their application (adding an AI instruction, for example), or because it cuts out royalty costs in a market where margins are slim (like budget IoT devices). Often it’s both. A telling quote came from Nordic Semiconductor’s CTO upon joining the RISC-V automotive initiative: “To retain our position at the leading edge of low-power wireless, it’s critical we maintain continuous access to efficient and powerful embedded microprocessors. An open collaboration… to enhance RISC-V IP and ensure a robust supply… is the ideal answer to this challenge.” autocarpro.in. In other words, even companies deeply successful with ARM chips (Nordic’s Bluetooth SoCs are all ARM-based today) see RISC-V as the path to future innovation and supply-chain stability.

RISC-V vs. ARM Cortex-M: How Do They Stack Up?

No report on RISC-V in IoT would be complete without directly comparing it to the incumbent king of edge processors: ARM’s Cortex-M and Cortex-A/R families. The rivalry has moved from speculation to reality, as many engineers now evaluate “ARM or RISC-V?” for new projects. Here’s a look at the key points of comparison:

• Performance and Efficiency: At the microcontroller level, RISC-V cores have reached parity with ARM Cortex-M in most respects. A simple RISC-V 32-bit core (RV32IMC) can achieve similar CoreMark/MHz as an Arm Cortex-M4, for instance. Andes, SiFive, and others offer RISC-V IP with pipeline depth and DSP extensions comparable to Cortex-M7 class, delivering competitive DSP and control performance. In high-end 64-bit embedded (analogous to Cortex-A), RISC-V cores like SiFive’s U-series or Alibaba T-Head’s Xuantie cores also rival Cortex-A5x in DMIPS and power consumption. ARM still holds an edge in some high-performance scenarios simply due to more years of optimization – e.g., Cortex-M7 can run at 600 MHz in ST’s MCUs with very fine-tuned pipelines, while current RISC-V MCU cores top out a bit lower. But the gap is small and closing. For many embedded and IoT uses, RISC-V cores are already “fast enough” with equal or lower power, and the next gen of RISC-V designs (with out-of-order execution, etc.) are coming on strong ts2.tech ts2.tech.
• Cost and Licensing: This is where RISC-V shines. ARM licensing can be expensive for startups or low-margin products – not only are there per-chip royalties, but often large upfront license fees. RISC-V, being open, allows companies to use free open-source cores or negotiate much cheaper deals with multiple IP suppliers. As a result, many emerging-market and hobbyist-focused chips choose RISC-V to save cost. For example, some Chinese MCU vendors can offer chips for a few cents partially because they pay no core royalty. Total cost of ownership can also favor RISC-V when considering long-term supply: no one can “turn off” your access to RISC-V IP, whereas an ARM license could theoretically be restricted (a concern in geopolitics and sanctions). On the flip side, ARM’s supporters argue the license fee buys a known quantity – tested cores and extensive support. But increasingly, the cost advantage of RISC-V is hard to ignore for IoT scale deployments, where shaving even $0.10 off a BOM is huge at millions of units.
• Ecosystem and Tools: ARM undoubtedly has a more mature and extensive ecosystem today. Generations of developers are familiar with ARM tools, ARM assembly, and the quirks of Cortex-M. A wealth of example code, application notes, and community forums exist for practically any ARM MCU problem. RISC-V’s ecosystem, as covered, is growing fast – but still, if you ask “Can I find an off-the-shelf CMSIS-Pack for this peripheral on RISC-V?”, the answer might be not yet, whereas for ARM it’s yes. ARM’s ecosystem advantage also shows in things like middleware: many commercial middleware packages (graphics libraries, TCP/IP stacks, etc.) had ARM support first. However, this gap is closing as middleware providers add RISC-V compatibility due to demand. One equalizer is that much of IoT development now happens in higher-level environments (like TensorFlow Lite for Microcontrollers, or Zephyr RTOS APIs) which are ISA-agnostic – as long as the compiler and OS support RISC-V, the rest just works. Still, conservative industries value ARM’s proven software ecosystem. As Embedded.com noted, RISC-V must match ARM in “reliability…compatibility, and certification” to fully win trust embedded.com. It’s well on its way, but not entirely there in perception yet.
• Flexibility and Innovation: Here RISC-V has a clear edge by design. ARM’s ISA is fixed – licensees cannot modify the instruction set (aside from Arm’s limited custom extension program in Cortex-M33, which is tightly controlled). RISC-V encourages custom instructions and specialized extensions. This means chip designers can innovate: for example, GreenWaves added custom DSP extensions to RISC-V for their GAP8 IoT chip to accelerate convolutional neural nets; another company could add an extension for ultra-fast encryption or sensor interfacing. These custom tweaks can yield big gains in specific applications, and are simply not possible with ARM cores (unless you go for an expensive ARM Architectural License to make your own core from scratch). The flip side is fragmentation risk, but RISC-V handles this by keeping base ISA stable and making extensions optional. Many see this flexibility as RISC-V’s secret weapon for IoT: the ability to tailor a processor to the problem, rather than always adapting the software to a one-size-fits-all core. As one RISC-V proponent put it, once vendors fully migrate and ecosystems develop, businesses will have “the perfect excuse to jump ship,” unleashing an “age of innovation and low-cost experimental design” in chips ts2.tech. This sentiment captures why startups and even big companies are excited – RISC-V lets them try new architectural ideas quickly.
• Security and Trust: ARM’s Cortex-M has offerings like TrustZone for security, and a long history of certifications (e.g., secure crypto libraries vetted on ARM). RISC-V is catching up here too: the RISC-V ISA has standard cryptography extensions (for acceleration of AES, SHA, etc.), and platforms like Hex Five’s MultiZone provide an isolation scheme akin to TrustZone using RISC-V’s Physical Memory Protection. There’s also an open security project called OpenTitan (a Google-sponsored secure element chip using RISC-V) that’s creating a root-of-trust on RISC-V. At this stage, ARM has the slight trust advantage simply from being time-tested – e.g., you can buy an ARM Cortex-M with a PSA Certified Level 2 security, whereas an equivalent RISC-V chip might not have gone through that exact process yet. But fundamentally, security is achievable on both; it’s more about ecosystem maturity than any ISA feature per se. RISC-V’s openness might even enhance security auditing long-term (since the designs can be inspected for backdoors or flaws).

In summary, ARM still leads in incumbent advantage and a fully battle-tested ecosystem, but RISC-V is quickly reaching parity in technical merits and surpasses ARM in flexibility and cost. For many new IoT designs, the decision is already tilting toward RISC-V if the required software support is in place. It’s telling that even Arm’s CEO has publicly acknowledged RISC-V’s rise; meanwhile RISC-V advocates like SiFive’s founder have cheekily noted that “Arm’s dominance was built in a closed ecosystem, but the future of innovation is open”. We are witnessing what one report dubbed a “silicon architecture showdown” in 2025 ts2.tech – and in IoT/edge, RISC-V clearly has the momentum.

Industry Voices: Optimism and Commitment to RISC-V

The shift in the edge computing landscape has drawn commentary from tech leaders across the industry. Here are a few insightful quotes that highlight how executives and experts see RISC-V in 2025:

• Calista Redmond – CEO of RISC-V International: “One of the biggest takeaways for RISC-V this year is the remarkable market traction RISC-V has gained and the impact it has across industries. The ecosystem is expanding rapidly… This growth is just the beginning.” riscv.org She emphasizes that the surge in adoption (billions of cores, hundreds of new members) reflects a broader trend toward open standards. In her view, RISC-V’s success is part of a larger movement rejecting proprietary lock-in in favor of collaborative innovation.
• Jens Fabrowsky – Exec VP at Bosch (Automotive Electronics): “Bosch is convinced that initiatives promoting the RISC-V open specifications will bring the global mobility market a significant step further… [This] will greatly help establish a reliable and efficient EU-based semiconductor ecosystem.” autocarpro.in Coming from a top automotive supplier, this quote underlines how even safety-critical industries see RISC-V as key to future resilience and innovation. Bosch’s support signals trust that RISC-V will meet the rigorous demands of automotive electronics.
• Svein-Egil Nielsen – CTO of Nordic Semiconductor: “Nordic’s IoT solutions represent the leading edge of low power wireless… to retain that position it’s critical we maintain continuous access to efficient and powerful embedded microprocessors. An open collaboration… to continually enhance innovative RISC-V microprocessor IP and ensure a robust and reliable supply of the technology is the ideal answer.” autocarpro.in This encapsulates why many IoT-focused companies are joining the RISC-V bandwagon: it’s not just about current cost or performance, but guaranteeing supply and agility for the future. No one company controls RISC-V, so there’s less risk of being cut off or slowed down by a single supplier’s roadmap.
• Ziad Asghar – Senior VP of Product Management, Qualcomm: “We’ve integrated RISC-V microcontrollers into many of our commercial platforms. We believe RISC-V’s open-source instruction set will increase innovation and has the potential to transform the industry.” autocarpro.in Qualcomm’s endorsement is huge – it implies RISC-V is already in products like wireless chips or phone subsystems, and that one of the world’s leading chip designers sees it as transformative. Indeed, rumors suggest Qualcomm’s next-gen smartphone SoCs will use RISC-V for certain subsystems (like sensor hubs or even the main application CPU down the line).
• Patrick Little – CEO of SiFive: “SiFive is combining the best RISC-V benefits in the only end-to-end portfolio designed to meet automotive needs today and long into the future… We are seeing widespread interest in our new RISC-V automotive solutions.” sifive.com As the head of a key RISC-V IP provider, Little is highlighting that RISC-V is ready not just for IoT hobby projects, but for demanding applications like automotive ADAS, and that multiple top-tier players are already on board. This underscores a confidence that RISC-V will be at the heart of next-gen vehicles, a domain once thought too conservative for a new ISA.

These voices, among many others, paint a picture of enthusiasm and commitment. The narrative has shifted from “RISC-V might be interesting someday” to “RISC-V is here now – and we’re all-in”. When long-time ARM customers publicly celebrate RISC-V (as NXP, Renesas, Qualcomm have done), it’s clear the industry is embracing change. As one tech analyst observed, “RISC-V’s advantages – customizability, scalability, and cost-effectiveness – make it a strong competitor to Arm… If current trends continue, it may surpass long-standing proprietary architectures sooner than expected.” eetimes.eu eetimes.eu The general sentiment is that we’ve crossed a threshold: RISC-V is no longer a risky choice; it’s becoming the default choice for many new edge designs.

Outlook: An Open Road Ahead

As we head deeper into 2025, the trajectory for RISC-V in edge and IoT markets looks extraordinarily bright. All the pieces – high-volume silicon, software support, community investment, and industry endorsement – are falling into place. The core shipments tell one story: billions today, tens of billions tomorrow. But equally important is the qualitative shift: RISC-V is moving from the periphery (simple MCUs and hobby kits) to the center of strategic roadmaps for major companies.

Consider the big picture: IoT and edge computing are projected to explode in the next decade, with tens of billions of new connected devices coming online. If current trends hold, a large and growing fraction of those devices will be running on RISC-V cores. We’re already seeing RISC-V in everything from a $0.03 microcontroller that revived an old PDA riscv.org riscv.org, to AI accelerator chips in data centers. By embracing open architecture, companies hope to break free of single-supplier dependencies and unlock faster innovation – a critical advantage in fast-moving markets like wearables and autonomous systems.

That said, competition will continue. ARM isn’t standing still; it still has a well-oiled machine and is especially strong in areas like analog integration (many MCUs come with a full ecosystem of peripherals, something RISC-V newcomers have to build up). And proprietary architectures haven’t vanished – there’s still some niche for MIPS, ARC, or others in certain embedded niches. But the momentum and mindshare are clearly with RISC-V. Industry alliances keep strengthening it (the RISC-V ecosystem now counts over 4,100 member organizations riscv.org, including virtually all top semiconductor firms). Governments are backing it (from Europe’s Chips Act funding RISC-V projects riscv.org, to China’s mandates). And crucially, developers are embracing it – the next generation of engineers is getting hands-on with RISC-V in university and maker projects, building skills that reinforce the ecosystem further.

In a real sense, 2025 is the tipping point for RISC-V in edge computing. The narrative has gone from “Will RISC-V succeed?” to “How fast will RISC-V take over?”. As the CTO of one RISC-V startup quipped, the question now is not whether RISC-V is coming – “it’s who’s truly ready to build with it” embedded.com. Those who are ready are already reaping the benefits of lower costs, vibrant innovation, and freedom to design without handcuffs. Those who aren’t may risk getting left behind as the industry coalesces around this new standard.

The remainder of the decade will likely see RISC-V cores in places we wouldn’t have imagined: your next smartwatch, your car’s driver-assist system, the smart sensor on a factory floor, and countless unseen embedded controllers. By combining open-source principles with semiconductor engineering, RISC-V has lit a fire under the IoT world. And as the data in this report shows – from billions of shipments to marquee design wins – that fire is only growing. The age of RISC-V at the edge has well and truly begun, promising a more open, innovative, and inclusive tech ecosystem for all.

Sources:

1. RISC-V International – “Top 10 RISC-V Milestones of 2023” (December 2023) riscv.org riscv.org
2. TS2 Technology – “RISC-V vs ARM vs x86: 2025 Showdown” (2025 analysis) ts2.tech ts2.tech
3. Tom’s Hardware – “Nvidia to ship a billion RISC-V cores in 2024” (Oct 2024) tomshardware.com tomshardware.com
4. RISC-V International Blog – “RISC-V 2024: Year of Global Growth and Innovation” (Dec 2024) riscv.org riscv.org
5. Autocar Pro – “Five chip giants drive RISC-V in automotive” (Aug 2023) autocarpro.in autocarpro.in
6. Embedded.com – “Can RISC-V Cross the Threshold in 2025?” (Nov 2024) embedded.com embedded.com
7. RISC-V International News – Nvidia & RISC-V Summit coverage (Oct 2024) tomshardware.com riscv.org
8. EE Times Europe – “Arm vs. RISC-V in 2025” (Dec 2024) eetimes.eu eetimes.eu
9. RISC-V International – Press Release: Renesas 32-bit RISC-V MCU Launch (Mar 2024) riscv.org
10. Electropages – “Open-Source RISC-V Chips Fuel China’s Tech Ascent” (June 2025) electropages.com