Sunnyvale, California, April 24, 2026, 06:55 PDT
- Synopsys has deepened its collaboration with TSMC, extending across leading-edge chipmaking processes and packaging technologies tailored for AI hardware.
- The update sharpens attention on Synopsys’ plans for life after Ansys, zeroing in on its software for detecting heat, power, and signal glitches in advanced chips.
- Cadence and Siemens both rolled out TSMC-focused updates to their design tools, a move that keeps the chip-design software race neck and neck.
Synopsys Inc. has pushed further into Taiwan Semiconductor Manufacturing Co.’s cutting-edge chipmaking platform this week, rolling out updated design software, interface IP, and analysis tools tailored for TSMC’s 3-nanometer, 2-nanometer, A16, and A14 processes, as AI chip design and verification challenges mount.
Timing is critical here because AI chips aren’t just simple slabs of silicon anymore. Designers are working with chiplets, advanced packaging, and high-bandwidth connections, so they have to evaluate not just the logic, but also heat management, power delivery, and signal performance before a design heads to manufacturing. Synopsys said its 3DIC Compiler now hooks directly into RedHawk-SC, RedHawk-SC Electrothermal, and Ansys HFSS tools to cover thermal, power, and high-speed signal checks.
Synopsys shares clawed back some ground Friday morning, bouncing to $483.00 as of 6:40 a.m. Pacific after Thursday’s 4.28% slide snapped an eight-day run and left the stock at $456.85. The move put Synopsys at around $92 billion in market value.
Michael Buehler-Garcia, senior vice president at Synopsys, pointed to TSMC’s newest process and packaging as “opening new frontiers” for performance, bandwidth, and energy efficiency. On TSMC’s side, Aveek Sarkar, who heads ecosystem and alliance management, called the Synopsys tie-up a response to “rapidly growing demands” in both AI and high-performance computing. Synopsys News Releases
TSMC rolled out the news during its North America Technology Symposium in Santa Clara, unveiling the A13 process—a tighter version of its A14 node—with production set for 2029. The chipmaker also detailed broader ambitions for its CoWoS advanced-packaging technology, while introducing COUPE, a co-packaged optics solution targeting faster data movement in AI data centers, on track to start production in 2026.
Synopsys isn’t the only one after those design projects. Cadence Design Systems says its broadened TSMC tie-up now spans N3, N2, A16, and A14 process tech. Siemens, for its part, reported EDA tool certifications for multiple TSMC advanced nodes, A16 and A14 included. EDA—electronic design automation—refers to software that helps design and check chips before they hit the fab.
Synopsys is pushing to integrate Ansys into its core chip design business, aiming to make the acquisition count. The Ansys deal brought in simulation software that can model heat, electromagnetic interference, and mechanical stress—key factors in real-world chip performance. Last month, Reuters reported that after closing the $35 billion acquisition in July 2025, Synopsys began launching fresh software tools.
The picture isn’t entirely rosy. Synopsys posted first-quarter fiscal 2026 revenue of $2.409 billion, jumping from $1.455 billion in the same period last year, and sees full-year revenue landing between $9.56 billion and $9.66 billion. “Strong execution,” Chief Financial Officer Shelagh Glaser said, summing up the quarter. Still, GAAP net income slid to $65.0 million from $295.7 million, weighed down by amortization, stock-based comp, and restructuring expenses. Synopsys Investor Relations
Execution is the sticking point here. Synopsys faces heavier costs post-Ansys, and back in November, Reuters said the company intended to slash about 10% of its headcount—close to 2,000 positions—as it shifted spending priorities following the acquisition. Its guidance also banks on no fresh export-control or U.S. Entity List moves, underlining that China policy still hangs over chip software providers.
Even so, Synopsys has another card to play in AI hardware, thanks to the latest TSMC update. TSMC’s move to advanced nodes and larger chip packages ups the stakes for toolmakers—catch design glitches sooner and pricing leverage could tilt your way, but stumble and rivals with smoother workflows could quickly eat your lunch.
